| 000 | 00702 a2200253 4500 | ||
|---|---|---|---|
| 003 | ISURu | ||
| 005 | 20240721182804.0 | ||
| 008 | 201120b ce ||||| |||| 00| 0 sin d | ||
| 020 | _a047198325X | ||
| 041 | _aeng | ||
| 080 |
_a004.436.2 _bRUS |
||
| 100 |
_aRushton, Andrew _921934 |
||
| 245 | _aVHDL for logic synthesis | ||
| 260 |
_aChichester _bJohn Wiley _c1998 _g1998 |
||
| 300 | _aXIII,375 p. | ||
| 650 | 0 |
_aCOMPUTER ENGINEERING _9109892 |
|
| 650 | 0 |
_aCOMPUTER SCIENCE _94 |
|
| 650 | 0 |
_aComputer Hardware Engineering _926307 |
|
| 650 | 0 |
_aLOGIC DESIGN _9109893 |
|
| 650 | 0 |
_aSYSTEMS PROGRAMMING _988596 |
|
| 650 | 0 |
_aVHDL _9114557 |
|
| 942 |
_cL _2ddc |
||
| 945 |
_dMain Library ADMIN _c26318 |
||
| 999 |
_c108369 _d135704 |
||